In What Format Is Data Stored In Registers

Associates - Registers

Processor operations mostly involve processing data. This information can be stored in memory and accessed from thereon. However, reading data from and storing data into memory slows down the processor, every bit it involves complicated processes of sending the data asking across the control bus and into the retention storage unit and getting the data through the aforementioned channel.

To speed up the processor operations, the processor includes some internal memory storage locations, called registers.

The registers store data elements for processing without having to access the retentiveness. A limited number of registers are built into the processor chip.

Processor Registers

There are x 32-bit and six xvi-bit processor registers in IA-32 compages. The registers are grouped into iii categories −

Full general registers,
Command registers, and
Segment registers.

The general registers are further divided into the following groups −

Data registers,
Pointer registers, and
Index registers.

Data Registers

Four 32-bit data registers are used for arithmetic, logical, and other operations. These 32-scrap registers tin can be used in three ways −

Every bit complete 32-bit data registers: EAX, EBX, ECX, EDX.
Lower halves of the 32-fleck registers tin can exist used as four 16-bit data registers: AX, BX, CX and DX.
Lower and higher halves of the above-mentioned four 16-chip registers can exist used as viii 8-bit data registers: AH, AL, BH, BL, CH, CL, DH, and DL.

Data Registers

Some of these data registers have specific use in arithmetical operations.

AX is the primary accumulator; it is used in input/output and most arithmetic instructions. For case, in multiplication operation, i operand is stored in EAX or AX or AL annals co-ordinate to the size of the operand.

BX is known as the base annals, equally it could be used in indexed addressing.

CX is known as the count register, as the ECX, CX registers store the loop count in iterative operations.

DX is known as the information register. Information technology is also used in input/output operations. Information technology is also used with AX annals along with DX for multiply and separate operations involving large values.

Pointer Registers

The pointer registers are 32-bit EIP, ESP, and EBP registers and respective 16-fleck right portions IP, SP, and BP. There are three categories of pointer registers −

Instruction Arrow (IP) − The 16-bit IP annals stores the first address of the next teaching to exist executed. IP in association with the CS register (equally CS:IP) gives the consummate accost of the current instruction in the code segment.
Stack Arrow (SP) − The 16-bit SP register provides the beginning value within the program stack. SP in association with the SS register (SS:SP) refers to be current position of data or address inside the program stack.
Base Pointer (BP) − The 16-chip BP register mainly helps in referencing the parameter variables passed to a subroutine. The address in SS register is combined with the offset in BP to go the location of the parameter. BP can also be combined with DI and SI equally base register for special addressing.

Pointer Registers

Alphabetize Registers

The 32-bit alphabetize registers, ESI and EDI, and their 16-scrap rightmost portions. SI and DI, are used for indexed addressing and sometimes used in addition and subtraction. There are two sets of alphabetize pointers −

Source Index (SI) − Information technology is used equally source alphabetize for cord operations.
Destination Alphabetize (DI) − It is used as destination alphabetize for cord operations.

Index Registers

Command Registers

The 32-chip education pointer register and the 32-bit flags register combined are considered every bit the control registers.

Many instructions involve comparisons and mathematical calculations and modify the condition of the flags and some other conditional instructions test the value of these condition flags to accept the command flow to other location.

The common flag bits are:

Overflow Flag (OF) − It indicates the overflow of a loftier-order bit (leftmost bit) of data afterwards a signed arithmetic operation.
Management Flag (DF) − It determines left or correct direction for moving or comparison string data. When the DF value is 0, the string operation takes left-to-right direction and when the value is set to 1, the cord functioning takes correct-to-left management.
Interrupt Flag (IF) − It determines whether the external interrupts similar keyboard entry, etc., are to be ignored or processed. Information technology disables the external interrupt when the value is 0 and enables interrupts when set to 1.
Trap Flag (TF) − It allows setting the operation of the processor in single-step fashion. The DEBUG program we used sets the trap flag, so we could footstep through the execution 1 pedagogy at a time.
Sign Flag (SF) − Information technology shows the sign of the result of an arithmetic operation. This flag is set according to the sign of a data item post-obit the arithmetic operation. The sign is indicated by the high-order of leftmost bit. A positive outcome clears the value of SF to 0 and negative result sets it to 1.
Zero Flag (ZF) − Information technology indicates the result of an arithmetic or comparison performance. A nonzero result clears the nil flag to 0, and a zero issue sets information technology to 1.
Auxiliary Carry Flag (AF) − It contains the carry from scrap 3 to bit 4 following an arithmetic operation; used for specialized arithmetics. The AF is set when a 1-byte arithmetic operation causes a carry from bit 3 into flake 4.
Parity Flag (PF) − It indicates the total number of ane-bits in the result obtained from an arithmetics operation. An even number of 1-bits clears the parity flag to 0 and an odd number of i-$.25 sets the parity flag to 1.
Bear Flag (CF) − It contains the carry of 0 or 1 from a high-order flake (leftmost) after an arithmetic functioning. It also stores the contents of last bit of a shift or rotate functioning.

The following table indicates the position of flag bits in the 16-fleck Flags register:

Flag:					O	D	I	T	S	Z		A		P		C
Chip no:	xv	14	xiii	12	11	10	nine	viii	7	6	5	iv	3	two	1	0

Segment Registers

Segments are specific areas defined in a program for containing data, code and stack. There are three master segments −

Lawmaking Segment − It contains all the instructions to be executed. A sixteen-bit Code Segment annals or CS register stores the starting accost of the code segment.
Information Segment − It contains information, constants and work areas. A 16-flake Data Segment register or DS annals stores the starting address of the information segment.
Stack Segment − It contains data and return addresses of procedures or subroutines. It is implemented as a 'stack' data structure. The Stack Segment register or SS annals stores the starting address of the stack.

Apart from the DS, CS and SS registers, in that location are other extra segment registers - ES (extra segment), FS and GS, which provide additional segments for storing data.

In assembly programming, a program needs to access the memory locations. All retention locations within a segment are relative to the starting address of the segment. A segment begins in an address evenly divisible by sixteen or hexadecimal 10. So, the rightmost hex digit in all such memory addresses is 0, which is not generally stored in the segment registers.

The segment registers stores the starting addresses of a segment. To get the exact location of data or education inside a segment, an offset value (or displacement) is required. To reference any memory location in a segment, the processor combines the segment address in the segment register with the first value of the location.

Example

Look at the following simple program to understand the use of registers in assembly programming. This program displays ix stars on the screen forth with a simple message −

department	.text    global _start	 ;must be declared for linker (gcc) 	 _start:	         ;tell linker entry point    mov	edx,len  ;bulletin length    mov	ecx,msg  ;message to write    mov	ebx,1    ;file descriptor (stdout)    mov	eax,iv    ;system call number (sys_write)    int	0x80     ;telephone call kernel 	    mov	edx,nine    ;bulletin length    mov	ecx,s2   ;message to write    mov	ebx,1    ;file descriptor (stdout)    mov	eax,4    ;arrangement call number (sys_write)    int	0x80     ;call kernel 	    mov	eax,1    ;organisation phone call number (sys_exit)    int	0x80     ;telephone call kernel 	 section	.data msg db 'Displaying ix stars',0xa ;a bulletin len equ $ - msg  ;length of message s2 times nine db '*'

When the above code is compiled and executed, it produces the post-obit effect −